A Two-Step Time-to-Digital Converter With 5.6-ps Resolution and 1–4255-?s Measurement Range

This paper presents a two-step coarse-fine time-to-digital converter (TDC) designed for ultrasonic flowmeter applications. To achieve high resolution using a low-frequency reference clock, a 7.7 MHz reference signal is multiplied by 32 using a multiplying delay-locked loop (MDLL), creating a high-speed internal clock for coarse quantization. The remaining time error after coarse quantization is pulse-stretched and further refined through fine quantization. A cost-effective calibration technique is proposed to enhance the pulse stretching circuit's performance across process, voltage, and temperature (PVT) variations. The TDC is implemented in a 0.11 µm/1.5 V CMOS process, achieving a resolution of 5.6 ps with an input range from 1 µs to 4255 µs. The core TDC circuit occupies 0.065 mm² and consumes 1.8 mW of power. Measured differential nonlinearity (DNL) and integral nonlinearity (INL) are ±3.1 ps and ±59.7 ps, respectively.

Keywords: Time-to-digital converter (TDC), multiplying delay-locked loop (MDLL), pulse stretching, ultrasonic flowmeter.