A Two-speed, Radix-4, Serial–Parallel Multiplier

Also Available Domains Arithmetic Core|Xilinx Vivado|Xilinx ISE

Project Code :TVMAFE12

Objective

The main objective of this project is to implement the high speed radix-4 modified booth multiplier. The high speed can be achieved by removing some unnecessary operations with the help of skip logic.

Abstract

In this paper, we present a two-speed, radix-4, serial-parallel multiplier for accelerating programs inclusive of digital filters, artificial neural networks, and different machine learning algorithms. Our multiplier is a variant of the serial–parallel (SP) changed radix-4 Booth multiplier that adds most effective the nonzero Booth encodings and skips over the zero operations, making the latency depending on the multiplier value. Two sub circuits with one-of-a-kind vital paths are utilized in order that throughput and latency are stepped forward for a subset of multiplier values. We show that for bit widths of 32 and 64, our optimizations can result in an improvement over the usual parallel Booth multiplier in phrases of location–time depending on the input set.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

Cadence EDA Tool
HDL: Verilog

Hardware Requirements:

Microsoft® Windows XP
Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
512 MB RAM
100 MB of available disk space

Learning Outcomes

Basics of Digital Electronics
FPGA design Flow
Introduction to Verilog Coding
Different modeling styles in Verilog

Data Flow modeling
Structural modeling
Behavioral modeling
Mixed level modeling

Combinational & Sequential circuits
Knowledge on Arithmetic circuits
About Booth multiplier
Serial and parallel multipliers
Knowledge on encoder, partial product generator
Applications of multipliers in real time
Cadence EDA for design and simulation
Generation of Netlist
Solution providing for real time problems
Project Development Skills:

Problem Analysis Skills
Problem Solving Skills
Logical Skills
Designing Skills
Testing Skills
Debugging Skills
Presentation Skills
Thesis Writing Skills

Demo Video

Front End Domains

Cadence EDA
Finite State Machines
Arithmetic Core
DSP Core
Communications
Nano Technology
Testing

Back End Domains

Nano Technology
Cadence EDA
Low Power VLSI
Core Memories
Transistor Logic

Tools

FPGA
H-Spice
Cadence EDA
QCA
Xilinx Vivado
Xilinx ISE
Tanner EDA
LT-Spice

Others

Matlab Interfacing

H-Spice

LT-Spice