A Sub-1V Current mode Bandgap Voltage Reference in Standard 65nm CMOS Process
Also Available Domains Core Memories|Tanner EDA|LT-Spice
Objective
The main objective of this project is to overcome the biasing issues in conventional BGR by using buffer at the amplifier input.
Abstract
This paper presents a sub-1V current-mode bandgap reference (BGR) for low-supply voltage system-on-chips (SOCs). The proposed BGR uses an amplifier with input buffer to relax the biasing requirements of the transistors, avoiding the native transistors and low-threshold devices. Fabricated in standard 45 nm CMOS technology. The BGR provides an output reference voltage of 571 mV while operating with a low supply voltage of 1.04 V. Integrated into a receiver operating at 1.2 V power supply, the BGR consumes a current in µA. All the designs are implemented in cadence virtuoso using 45 nm technology .
Index Terms—Bandgap reference, CMOS, temperature compensation, voltage reference.
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
Block Diagram
Specifications
Software Requirements:
· cadence virtuoso
· Technology files: 45nm
Hardware Requirements:
· Microsoft® Windows XP
· Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
· 512 MB RAM
· 100 MB of available disk space
Learning Outcomes
- Introduction to bandgap reference circuit
- Knowledge on OPAMP
- Transistors & its applications
o Types of Transistors
o Logic Gates using Transistors
o Pull Up and Pull Down networks
o Importance of Transistors
· MOS Fundamentals
· NMOS/PMOS/CMOS Technologies
· How to design circuits using Transistor logic ?
· How to design low power, high speed area efficient transistor level circuits?
· Introduction to Analog Electronics
· Importance of bandgap reference circuit
· Cadence virtuoso tool for design and simulation
· Solution providing for real time problems
· Project Development Skills:
o Problem Analysis Skills
o Problem Solving Skills
o Logical Skills
o Designing Skills
o Testing Skills
o Debugging Skills
o Presentation skills
o Thesis Writing Skills
Paper Publishing
Request Call Back
Would you like to receive a free callback now?
Choose the best time for callback:
Leave your message and we will contact you as soon as possible
6-2-85/B, Old Maternity Hospital Road, Thyagaraja Nagar, Tirupati, Andhra Pradesh – 517501
+91 9030333433
+91 9393939065
0877-2261612
Disclaimer - Takeoff Edu Group Projects are not associated or affiliated with IEEE in any way. The IEEE Projects mentioned here are mentioned in the context of student projects, whose ideas are derived from IEEE publications, not projects of or by IEEE.
