A Single Ring-Oscillator-Based Test Structure for Timing Characterization of Dynamic Circuit

Abstract:

Dynamic circuits are widely used in applications that demand high speed, such as critical paths in digital and analog/mixed-signal circuits. However, they have not been fully characterized or integrated into digital design flows due to the complexity of their timing requirements. This article introduces a systematic approach for defining the timing parameters necessary for characterizing dynamic circuits. We also present a test structure based on a single ring oscillator for on-chip measurement of these timing parameters. Using just the single output from the ring oscillator, this structure can efficiently extract key timing metrics, such as delay and setup/hold times, under varying conditions like input signal transition times and output load capacitance. This data is sufficient for creating liberty files for a standard-cell library. The proposed test structure allows for the iterative examination of setup/hold constraints in real operating conditions, enabling the determination of worst-case results and the estimation of the circuit's error rate.

Keywords— Pipeline; Soft Errors; Single Event Transients (SET)