A Power-Delay and Area Efficient Voltage Level Shifter Based on a Reflected-Output Wilson Current Mirror Level Shifter

This brief presents an area-efficient and ultra-low power high-speed voltage level shifter (LS) based on a reflected output Wilson current mirror level shifter (WCMLS). The proposed technique removes the limitation of conventional WCMLS in using a current mirror with extremely high sizing ratio significantly saving area and power. Compared to the stateof-the-art counterparts, the proposed LS comprises relatively fewer elements all minimum sized further reducing the area. The proposed LS operates well with extremely sub-threshold input voltages while exhibiting considerably lower propagation delay. Implemented in a standard 0.18-μm CMOS process, post-layout simulations confirm that the proposed sub-threshold LS can effectively transform input voltage levels as low as 50 mV to about 1.8 V at output without employing any multi-threshold devices.