A High-Efficiency Fast-Transient LDO with Low-Impedance Transient-Current Enhanced Buffer
Also Available Domains Cadence EDA
Objective
The main objective of this paper is to implement Low Dropout Regulator by employing novel buffer. The buffer designed is of low-impedance transient-current enhanced buffer.
Block Diagram
Specifications
Software Requirements:
- Tool: Cadence Virtuoso
- Technology: GPDK 45nm
Hardware Requirements:
- Microsoft® Windows XP
- Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
- 512 MB RAM
- 100 MB of available disk space
Learning Outcomes
· Introduction to Analog Electronics
· Basic knowledge on Amplifier
o Different configurations of Amplifier
o Advantages & Applications
· Learning of LTE Buffer
· Knowledge on LDO Concept
· Tool learning in Cadence Virtuoso
· Transistor Level design of LDO in Cadence.
· Analysis of circuit and simulation results.
· Scope of LDO in today’s world
· Real time applications of LDO.
Paper Publishing
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