A Division-Free Toom-cook Multiplication Based Montgomery Modular Multiplication
Also Available Domains Arithmetic Core|Cadence EDA|Xilinx ISE
Project Code :TVPGTO506
Objective
In this paper, a Toom-Cook Multiplication algorithm is theoretically one of the efficient when compare to that of traditionally used Schoolbook and Karatsuba Multiplication
Abstract
Toom-Cook Multiplication is a theoretically more efficient multiplication algorithm than traditionally used Karatsuba and Schoolbook Multiplication but is rarely used in practical hardware designs due to its inherent exact divisions, which are time-consuming and difficult for parallel and serial acceleration. This paper proposes a method of division free Toom-Cook Multiplication based Montgomery Modular Multiplication, which makes it possible for Toom-Cook multiplication to be applied in practical and efficient hardware implementations. We also provide a hardware implementation of modular multipliers of 256 bits and 1024 bits with advantages on area-time-product over previous researches.
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Learning Outcomes
Basics of Digital Electronics and Verilog.
Related Topics
Paper Publishing
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