A Binary High Speed Floating Point Multiplier
Objective
The main aim of this project is to implement the floating point multiplier with reduced delay. The high performance can be achieved in this work by using Carry save multiplier
Abstract
In this paper, a high speed floating point multiplier is designed to improve the performance of DSP and multimedia applications. here the performance is improved by using the carry save multiplier for multiplying the mantissa. Simulation results show that the proposed multiplier has high performance in terms of delay when compared to existing multiplier designs.
Keywords: Carry save multiplier, Digital Signal Processing (DSP)
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
Block Diagram
Specifications
Software Requirements:
- Xilinx ISE 14.7/ Xilinx Vivado
- HDL: Verilog
Hardware Requirements:
- Microsoft® Windows XP
- Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
- 512 MB RAM
- 100 MB of available disk space
Learning Outcomes
- Basics of Digital Electronics
- FPGA design Flow
- Introduction to Verilog Coding
- Different modeling styles in Verilog
- Data Flow modeling
- Structural modeling
- Behavioral modeling
- Mixed level modeling
- Introduction to Multipliers
- Different types of Multipliers
- Array multipliers
- Booth multiplier
- Carry save multiplier
- Advantages of Carry save multiplier
- How to design High speed, Low power and Area Efficient Circuits
- Scope in today’s world
- Applications in real time
- Xilinx ISE 14.7/Xilinx Vivado for design and simulation
- Generation of Netlist
- Solution providing for real time problems
- Project Development Skills:
- Problem Analysis Skills
- Problem Solving Skills
- Logical Skills
- Designing Skills
- Testing Skills
- Debugging Skills
- Presentation Skills
- Thesis Writing Skills
Demo Video
Request for Video
Paper PublishingRequest Call Back
Would you like to receive a free callback now?
Choose the best time for callback:
Leave your message and we will contact you as soon as possible
6-2-85/B, Old Maternity Hospital Road, Thyagaraja Nagar, Tirupati, Andhra Pradesh – 517501
+91 9030333433
+91 9393939065
0877-2261612
Disclaimer - Takeoff Edu Group Projects are not associated or affiliated with IEEE in any way. The IEEE Projects mentioned here are mentioned in the context of student projects, whose ideas are derived from IEEE publications, not projects of or by IEEE.
