The ultra-low power consumption makes this amplifier suitable for potential use in implantable neuro technologies, where minimizing power consumption is critical for long-term operation
This paper introduces a low-power, low-noise amplifier tailored for neural recording applications. The proposed design utilizes a single-stage current-reuse telescopic topology to achieve high DC gain and enhance the noise efficiency factor (NEF). This configuration also allows the amplifier to be scaled for high-bandwidth sensing applications or to lower the thermal noise floor. Fabricated using a standard 180 NM CMOS process, WITH THE CADENCE VIRTUOSO TOOL, the amplifier occupies an active area of 0.16mmΒ². Experimental results demonstrate a power consumption of 47.55NW with a 1.2V supply, and an NEF of 1.0.
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