Project Code: TVPGBE165
Project Title:Scan Chain Architecture With Data Duplication for Multiple Scan Cell Fault DiagnosisView DetailsProject Code: TVPGBE160
Project Title:Implementation of a Multipath Fully Differential OTA in 0.18-um CMOS ProcessView DetailsProject Code: TVPGBE159
Project Title:A DFT-Compatible In-Situ Timing Error Detection and Correction Structure Featuring Low Area and Test OverheadView DetailsProject Code: TVPGBE158
Project Title:CMOS Clock-Gated Synchronous Up-Down Counter With High-Speed Local Clock Generation and Compact Toggle Flip-FlopView DetailsProject Code: TVPGBE157
Project Title:A DIFFERENTIAL FLIP-FLOP WITH STATIC CONTENTION-FREE CHARACTERISTICS IN 28 NM FOR LOW-VOLTAGE, LOW-POWER APPLICATIONSView DetailsProject Code: TVPGBE156
Project Title:Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write AssistView DetailsProject Code: TVPGBE155
Project Title:Energy-Efficient Single-Ended Read Write 10T Near Threshold SRAMView DetailsProject Code: TVPGBE164
Project Title:Design and Implementation of RNB multiplier Using NP Domino logicView DetailsProject Code: TVPGBE163
Project Title:Design of High-Performance GDI Logic based 8-Tap FIR Filter at 22nm CMOS Technology using Array MultiplierView Details S.no | Project Code | Project Name | Action |
---|---|---|---|
1 | TVPGBE165 | Scan Chain Architecture With Data Duplication for Multiple Scan Cell F... | |
2 | TVPGBE160 | Implementation of a Multipath Fully Differential OTA in 0.18-um CMOS P... | |
3 | TVPGBE159 | A DFT-Compatible In-Situ Timing Error Detection and Correction Structu... | |
4 | TVPGBE158 | CMOS Clock-Gated Synchronous Up-Down Counter With High-Speed Local Clo... | |
5 | TVPGBE157 | A DIFFERENTIAL FLIP-FLOP WITH STATIC CONTENTION-FREE CHARACTERISTICS I... | |
6 | TVPGBE156 | Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write As... | |
7 | TVPGBE155 | Energy-Efficient Single-Ended Read Write 10T Near Threshold SRAM | |
8 | TVPGBE164 | Design and Implementation of RNB multiplier Using NP Domino logic | |
9 | TVPGBE163 | Design of High-Performance GDI Logic based 8-Tap FIR Filter at 22nm C... |
Project Code: TVPGBE165
Project Title:Scan Chain Architecture With Data Duplication for Multiple Scan Cell Fault DiagnosisView DetailsProject Code: TVPGBE160
Project Title:Implementation of a Multipath Fully Differential OTA in 0.18-um CMOS ProcessView DetailsProject Code: TVPGBE159
Project Title:A DFT-Compatible In-Situ Timing Error Detection and Correction Structure Featuring Low Area and Test OverheadView DetailsProject Code: TVPGBE158
Project Title:CMOS Clock-Gated Synchronous Up-Down Counter With High-Speed Local Clock Generation and Compact Toggle Flip-FlopView DetailsProject Code: TVPGBE157
Project Title:A DIFFERENTIAL FLIP-FLOP WITH STATIC CONTENTION-FREE CHARACTERISTICS IN 28 NM FOR LOW-VOLTAGE, LOW-POWER APPLICATIONSView DetailsProject Code: TVPGBE156
Project Title:Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write AssistView DetailsProject Code: TVPGBE155
Project Title:Energy-Efficient Single-Ended Read Write 10T Near Threshold SRAMView DetailsProject Code: TVPGBE164
Project Title:Design and Implementation of RNB multiplier Using NP Domino logicView DetailsProject Code: TVPGBE163
Project Title:Design of High-Performance GDI Logic based 8-Tap FIR Filter at 22nm CMOS Technology using Array MultiplierView Details S.no | Project Code | Project Name | Action |
---|---|---|---|
1 | TVPGBE165 | Scan Chain Architecture With Data Duplication for Multiple Scan Cell F... | |
2 | TVPGBE160 | Implementation of a Multipath Fully Differential OTA in 0.18-um CMOS P... | |
3 | TVPGBE159 | A DFT-Compatible In-Situ Timing Error Detection and Correction Structu... | |
4 | TVPGBE158 | CMOS Clock-Gated Synchronous Up-Down Counter With High-Speed Local Clo... | |
5 | TVPGBE157 | A DIFFERENTIAL FLIP-FLOP WITH STATIC CONTENTION-FREE CHARACTERISTICS I... | |
6 | TVPGBE156 | Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write As... | |
7 | TVPGBE155 | Energy-Efficient Single-Ended Read Write 10T Near Threshold SRAM | |
8 | TVPGBE164 | Design and Implementation of RNB multiplier Using NP Domino logic | |
9 | TVPGBE163 | Design of High-Performance GDI Logic based 8-Tap FIR Filter at 22nm C... |
Project Code: TVPGBE165
Project Title:Scan Chain Architecture With Data Duplication for Multiple Scan Cell Fault DiagnosisView DetailsProject Code: TVPGBE160
Project Title:Implementation of a Multipath Fully Differential OTA in 0.18-um CMOS ProcessView DetailsProject Code: TVPGBE159
Project Title:A DFT-Compatible In-Situ Timing Error Detection and Correction Structure Featuring Low Area and Test OverheadView DetailsProject Code: TVPGBE158
Project Title:CMOS Clock-Gated Synchronous Up-Down Counter With High-Speed Local Clock Generation and Compact Toggle Flip-FlopView DetailsProject Code: TVPGBE157
Project Title:A DIFFERENTIAL FLIP-FLOP WITH STATIC CONTENTION-FREE CHARACTERISTICS IN 28 NM FOR LOW-VOLTAGE, LOW-POWER APPLICATIONSView DetailsProject Code: TVPGBE156
Project Title:Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write AssistView DetailsProject Code: TVPGBE155
Project Title:Energy-Efficient Single-Ended Read Write 10T Near Threshold SRAMView DetailsProject Code: TVPGBE164
Project Title:Design and Implementation of RNB multiplier Using NP Domino logicView DetailsProject Code: TVPGBE163
Project Title:Design of High-Performance GDI Logic based 8-Tap FIR Filter at 22nm CMOS Technology using Array MultiplierView Details S.no | Project Code | Project Name | Action |
---|---|---|---|
1 | TVPGBE165 | Scan Chain Architecture With Data Duplication for Multiple Scan Cell F... | |
2 | TVPGBE160 | Implementation of a Multipath Fully Differential OTA in 0.18-um CMOS P... | |
3 | TVPGBE159 | A DFT-Compatible In-Situ Timing Error Detection and Correction Structu... | |
4 | TVPGBE158 | CMOS Clock-Gated Synchronous Up-Down Counter With High-Speed Local Clo... | |
5 | TVPGBE157 | A DIFFERENTIAL FLIP-FLOP WITH STATIC CONTENTION-FREE CHARACTERISTICS I... | |
6 | TVPGBE156 | Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write As... | |
7 | TVPGBE155 | Energy-Efficient Single-Ended Read Write 10T Near Threshold SRAM | |
8 | TVPGBE164 | Design and Implementation of RNB multiplier Using NP Domino logic | |
9 | TVPGBE163 | Design of High-Performance GDI Logic based 8-Tap FIR Filter at 22nm C... |