S.no
Project Code
Project Name
Action
1 TVPGBE124 Novel Ternary Adder and Multiplier Designs Without Using Decoders or E...
2 TVPGBE123 Comparative Analysis of Memristor Models with a Window Function Descri...
3 TVPGBE122 Accuracy-Configurable Radix-4 Adder with a Dynamic Output Modification...

Cadence EDA|Tanner EDA

4 TVPGBE110 A Low-Power Timing-Error-Tolerant Circuit by Controlling a Clock

Cadence EDA|Tanner EDA

5 TVPGBE120 TIQ flash ADC with threshold compensation

Cadence EDA|Tanner EDA

6 TVPGBE118 Performance Analysis of Full Adder based on Domino Logic Technique

Cadence EDA|Tanner EDA

7 TVPGBE115 Design of Two Stage Operational Amplifier and Implementation of Flash ...

Low Power VLSI|Cadence EDA|Tanner EDA

8 TVPGBE113 BTI and Soft-Error Tolerant Voltage Bootstrapped Schmitt Trigger Circu...

Cadence EDA|Tanner EDA

9 TVPGBE121 A Very-Low-Voltage Frequency Divider in Folded MOS Current Mode Logic ...

Cadence EDA|Tanner EDA

10 TVREBE19_17 Parametric and Functional Degradation Analysis of Complete 14-nm FinFE...

Cadence EDA|Cadence EDA

Items per page:
1 – 10 of 10
S.no
Project Code
Project Name
Action
1 TVPGBE124 Novel Ternary Adder and Multiplier Designs Without Using Decoders or E...
2 TVPGBE123 Comparative Analysis of Memristor Models with a Window Function Descri...
3 TVPGBE122 Accuracy-Configurable Radix-4 Adder with a Dynamic Output Modification...

Cadence EDA|Tanner EDA

4 TVPGBE110 A Low-Power Timing-Error-Tolerant Circuit by Controlling a Clock

Cadence EDA|Tanner EDA

5 TVPGBE120 TIQ flash ADC with threshold compensation

Cadence EDA|Tanner EDA

6 TVPGBE118 Performance Analysis of Full Adder based on Domino Logic Technique

Cadence EDA|Tanner EDA

7 TVPGBE115 Design of Two Stage Operational Amplifier and Implementation of Flash ...

Low Power VLSI|Cadence EDA|Tanner EDA

8 TVPGBE113 BTI and Soft-Error Tolerant Voltage Bootstrapped Schmitt Trigger Circu...

Cadence EDA|Tanner EDA

9 TVPGBE121 A Very-Low-Voltage Frequency Divider in Folded MOS Current Mode Logic ...

Cadence EDA|Tanner EDA

10 TVREBE19_17 Parametric and Functional Degradation Analysis of Complete 14-nm FinFE...

Cadence EDA|Cadence EDA

Items per page:
1 – 10 of 10
S.no
Project Code
Project Name
Action
1 TVPGBE124 Novel Ternary Adder and Multiplier Designs Without Using Decoders or E...
2 TVPGBE123 Comparative Analysis of Memristor Models with a Window Function Descri...
3 TVPGBE122 Accuracy-Configurable Radix-4 Adder with a Dynamic Output Modification...

Cadence EDA|Tanner EDA

4 TVPGBE110 A Low-Power Timing-Error-Tolerant Circuit by Controlling a Clock

Cadence EDA|Tanner EDA

5 TVPGBE120 TIQ flash ADC with threshold compensation

Cadence EDA|Tanner EDA

6 TVPGBE118 Performance Analysis of Full Adder based on Domino Logic Technique

Cadence EDA|Tanner EDA

7 TVPGBE115 Design of Two Stage Operational Amplifier and Implementation of Flash ...

Low Power VLSI|Cadence EDA|Tanner EDA

8 TVPGBE113 BTI and Soft-Error Tolerant Voltage Bootstrapped Schmitt Trigger Circu...

Cadence EDA|Tanner EDA

9 TVPGBE121 A Very-Low-Voltage Frequency Divider in Folded MOS Current Mode Logic ...

Cadence EDA|Tanner EDA

10 TVREBE19_17 Parametric and Functional Degradation Analysis of Complete 14-nm FinFE...

Cadence EDA|Cadence EDA

Items per page:
1 – 10 of 10
Final year projects