At Takeoff Edu Group, we offer a wide range of VLSI cadence projects for students that are designed to help them gain hands-on experience in the design and verification of ICs using Cadence tools. Our projects are suitable for students pursuing B.Tech, M.Tech, and Ph.D. degrees in VLSI, Electronics, and Computer Science.
Project Code: TVMATO1008
Project Title:Design and Analysis of Low-Power High Performance 4-Bit Parallel Shift Register using Retentive True Single Phase Clocked D-Flip FlopLow Power VLSI| Tanner EDA| LT-Spice
View DetailsProject Code: TVMATO1107
Project Title:A Partially Static High Frequency 18T Hybrid Topological Flip-Flop Design for Low Power ApplicationTanner EDA| Low Power VLSI| Transistor Logic
View DetailsProject Code: TVMATO1092
Project Title:Performance Analysis of 4-Bit Multiplier using 90nm TechnologyView DetailsProject Code: TVMATO1147
Project Title:DESIGN AND IMPLEMENTATION OF LOW POWER VCO USING PSEUDO NMOS LOGIC FOR PLLView DetailsProject Code: TVMATO1109
Project Title:A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift RegistersTanner EDA| LT-Spice| Low Power VLSI| Transistor Logic
View DetailsProject Code: TVMATO1112
Project Title:An Accurate Low-Power Power-on-Reset Circuit in 55-nm CMOS TechnologyTanner EDA| Low Power VLSI| Transistor Logic
View DetailsProject Code: TVMATO1144
Project Title:Analysis and Comparison in the Energy-Delay Space of Nanometer CMOS One-Bit Full-AddersView DetailsProject Code: TVMATO1014
Project Title:A High-Efficiency Fast-Transient LDO with Low-Impedance Transient-Current Enhanced BufferView DetailsProject Code: TVMATO715
Project Title:BTI and Soft-Error Tolerant Voltage Bootstrapped Schmitt Trigger CircuitView DetailsProject Code: TVMATO1156
Project Title:Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning TechniqueView Details S.no | Project Code | Project Name | Action |
|---|---|---|---|
| 1 | TVMATO1008 | Design and Analysis of Low-Power High Performance 4-Bit Parallel Shift... | |
| 2 | TVMATO1107 | A Partially Static High Frequency 18T Hybrid Topological Flip-Flop Des... | |
| 3 | TVMATO1092 | Performance Analysis of 4-Bit Multiplier using 90nm Technology | |
| 4 | TVMATO1147 | DESIGN AND IMPLEMENTATION OF LOW POWER VCO USING PSEUDO NMOS LOGIC FOR... | |
| 5 | TVMATO1109 | A Novel Clock Gating Approach for the Design of Low-Power Linear Feedb... | |
| 6 | TVMATO1112 | An Accurate Low-Power Power-on-Reset Circuit in 55-nm CMOS Technology | |
| 7 | TVMATO1144 | Analysis and Comparison in the Energy-Delay Space of Nanometer CMOS On... | |
| 8 | TVMATO1014 | A High-Efficiency Fast-Transient LDO with Low-Impedance Transient-Curr... | |
| 9 | TVMATO715 | BTI and Soft-Error Tolerant Voltage Bootstrapped Schmitt Trigger Circu... | |
| 10 | TVMATO1156 | Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering G... |
Project Code: TVMATO1008
Project Title:Design and Analysis of Low-Power High Performance 4-Bit Parallel Shift Register using Retentive True Single Phase Clocked D-Flip FlopLow Power VLSI| Tanner EDA| LT-Spice
View DetailsProject Code: TVMATO1107
Project Title:A Partially Static High Frequency 18T Hybrid Topological Flip-Flop Design for Low Power ApplicationTanner EDA| Low Power VLSI| Transistor Logic
View DetailsProject Code: TVMATO1092
Project Title:Performance Analysis of 4-Bit Multiplier using 90nm TechnologyView DetailsProject Code: TVMATO1147
Project Title:DESIGN AND IMPLEMENTATION OF LOW POWER VCO USING PSEUDO NMOS LOGIC FOR PLLView DetailsProject Code: TVMATO1109
Project Title:A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift RegistersTanner EDA| LT-Spice| Low Power VLSI| Transistor Logic
View DetailsProject Code: TVMATO1112
Project Title:An Accurate Low-Power Power-on-Reset Circuit in 55-nm CMOS TechnologyTanner EDA| Low Power VLSI| Transistor Logic
View DetailsProject Code: TVMATO1144
Project Title:Analysis and Comparison in the Energy-Delay Space of Nanometer CMOS One-Bit Full-AddersView DetailsProject Code: TVMATO1014
Project Title:A High-Efficiency Fast-Transient LDO with Low-Impedance Transient-Current Enhanced BufferView DetailsProject Code: TVMATO715
Project Title:BTI and Soft-Error Tolerant Voltage Bootstrapped Schmitt Trigger CircuitView DetailsProject Code: TVMATO1156
Project Title:Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning TechniqueView Details S.no | Project Code | Project Name | Action |
|---|---|---|---|
| 1 | TVMATO1008 | Design and Analysis of Low-Power High Performance 4-Bit Parallel Shift... | |
| 2 | TVMATO1107 | A Partially Static High Frequency 18T Hybrid Topological Flip-Flop Des... | |
| 3 | TVMATO1092 | Performance Analysis of 4-Bit Multiplier using 90nm Technology | |
| 4 | TVMATO1147 | DESIGN AND IMPLEMENTATION OF LOW POWER VCO USING PSEUDO NMOS LOGIC FOR... | |
| 5 | TVMATO1109 | A Novel Clock Gating Approach for the Design of Low-Power Linear Feedb... | |
| 6 | TVMATO1112 | An Accurate Low-Power Power-on-Reset Circuit in 55-nm CMOS Technology | |
| 7 | TVMATO1144 | Analysis and Comparison in the Energy-Delay Space of Nanometer CMOS On... | |
| 8 | TVMATO1014 | A High-Efficiency Fast-Transient LDO with Low-Impedance Transient-Curr... | |
| 9 | TVMATO715 | BTI and Soft-Error Tolerant Voltage Bootstrapped Schmitt Trigger Circu... | |
| 10 | TVMATO1156 | Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering G... |
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VLSI (Very-Large-Scale Integration) technology has revolutionized the electronics industry and has played a major role in the development of modern electronic devices. Cadence, a leading electronic design automation (EDA) company, provides a suite of tools and solutions that enable designers to create complex, high-performance and low-power integrated circuits (ICs).
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Disclaimer - Takeoff Edu Group Projects, are not associated or affiliated with IEEE, in any way. The IEEE Projects mentioned here are mentioned in the context of student projects, whose ideas are derived from IEEE publications, and not projects of or by IEEE.
