Items per page:
1 – 10 of 50
S.no
Project Code
Project Name
Action
1 TVPGFE302 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

Cadence EDA|Xilinx Vivado|Xilinx ISE

2 TVPGFE303 Constant-time Synchronous Binary Counter with Minimal Clock Period

Xilinx Vivado|Xilinx ISE

3 TVPGFE304 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Xilinx Vivado|Xilinx ISE

4 TVPGFE305 Design and Verification of 16 bit RISC Processor Using Vedic Mathemati...

Xilinx Vivado|Xilinx ISE

5 TVPGFE306 Design of Ultra-Low Power Consumption Approximate 4-2 Compressors Base...

Xilinx Vivado|Xilinx ISE

6 TVPGFE307 Design of Very High-Speed Pipeline FIR Filter Through Precise Critical...

Xilinx Vivado|Xilinx ISE

7 TVPGFE308 Fast Binary Counters and Compressors Generated by Sorting Network

Xilinx Vivado|Xilinx ISE

8 TVPGFE309 Fast Mapping and Updating Algorithms for a Binary CAM on FPGA

Xilinx Vivado|Xilinx ISE

9 TVPGFE299 Shadow: A Lightweight Block Cipher for IoT Nodes

Xilinx Vivado|Xilinx ISE

10 TVPGFE301 DS2B: Dynamic and Secure Substitution Box for Efficient Speech Encrypt...

Xilinx Vivado|Xilinx ISE

Items per page:
1 – 10 of 50
Items per page:
1 – 10 of 50
S.no
Project Code
Project Name
Action
1 TVPGFE302 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

Cadence EDA|Xilinx Vivado|Xilinx ISE

2 TVPGFE303 Constant-time Synchronous Binary Counter with Minimal Clock Period

Xilinx Vivado|Xilinx ISE

3 TVPGFE304 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Xilinx Vivado|Xilinx ISE

4 TVPGFE305 Design and Verification of 16 bit RISC Processor Using Vedic Mathemati...

Xilinx Vivado|Xilinx ISE

5 TVPGFE306 Design of Ultra-Low Power Consumption Approximate 4-2 Compressors Base...

Xilinx Vivado|Xilinx ISE

6 TVPGFE307 Design of Very High-Speed Pipeline FIR Filter Through Precise Critical...

Xilinx Vivado|Xilinx ISE

7 TVPGFE308 Fast Binary Counters and Compressors Generated by Sorting Network

Xilinx Vivado|Xilinx ISE

8 TVPGFE309 Fast Mapping and Updating Algorithms for a Binary CAM on FPGA

Xilinx Vivado|Xilinx ISE

9 TVPGFE299 Shadow: A Lightweight Block Cipher for IoT Nodes

Xilinx Vivado|Xilinx ISE

10 TVPGFE301 DS2B: Dynamic and Secure Substitution Box for Efficient Speech Encrypt...

Xilinx Vivado|Xilinx ISE

Items per page:
1 – 10 of 50
Items per page:
1 – 10 of 50
S.no
Project Code
Project Name
Action
1 TVPGFE302 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

Cadence EDA|Xilinx Vivado|Xilinx ISE

2 TVPGFE303 Constant-time Synchronous Binary Counter with Minimal Clock Period

Xilinx Vivado|Xilinx ISE

3 TVPGFE304 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Xilinx Vivado|Xilinx ISE

4 TVPGFE305 Design and Verification of 16 bit RISC Processor Using Vedic Mathemati...

Xilinx Vivado|Xilinx ISE

5 TVPGFE306 Design of Ultra-Low Power Consumption Approximate 4-2 Compressors Base...

Xilinx Vivado|Xilinx ISE

6 TVPGFE307 Design of Very High-Speed Pipeline FIR Filter Through Precise Critical...

Xilinx Vivado|Xilinx ISE

7 TVPGFE308 Fast Binary Counters and Compressors Generated by Sorting Network

Xilinx Vivado|Xilinx ISE

8 TVPGFE309 Fast Mapping and Updating Algorithms for a Binary CAM on FPGA

Xilinx Vivado|Xilinx ISE

9 TVPGFE299 Shadow: A Lightweight Block Cipher for IoT Nodes

Xilinx Vivado|Xilinx ISE

10 TVPGFE301 DS2B: Dynamic and Secure Substitution Box for Efficient Speech Encrypt...

Xilinx Vivado|Xilinx ISE

Items per page:
1 – 10 of 50
Final year projects