Also Available Domains Transistor Logic
In this project, the 32 nm CNTFET-based Ternary Half Adder (THA) and Multiplier (TMUL) circuits use novel ternary unary operator circuits and implement two power supplies Vdd and Vdd/2 without using any ternary decoders, basic logic gates, or encoders to minimize the number of used transistors and improve the energy efficiency.
Abstract:
In this project, the 32 nm CNTFET-based Ternary Half Adder (THA) and Multiplier (TMUL) circuits use novel ternary unary operator circuits and implement two power supplies Vdd and Vdd/2 without using any ternary decoders, basic logic gates, or encoders to minimize the number of used transistors and improve the energy efficiency. Multiple-Valued Logic systems present significant improvements in terms of energy consumption over binary logic systems. This paper proposes new ternary combinational digital circuits that reduce energy consumption in low-power nano-scale embedded systems and Internet of Thing (IoT) devices to save their battery consumption.
NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.
o Types of Transistors
o Logic Gates using Transistors
o Pull Up and Pull Down networks
o Importance of Transistors