Paper PublishingLow-Power Retentive True Single-Phase-Clocked Flip-Flop With Redundant-Precharge-Free Operation
Also Available Domains Low Power VLSI|Cadence EDA
Objective
In this project, an energy-ef?cient retentive True Single-Phase-Clocked (TSPC) FF is proposed. With the employment of input-aware pre charge scheme, the proposed TSPC FF pre charge only when necessary. By adopting this technique, power consumption is minimized.
Abstract
In this Project, an energy-efficient retentive true single-phase-clocked (TSPC) FF is proposed.As basic components, optimizing power consumption of flip-flops (FFs) can significantly reduce the power of digital systems. With the employment of input-aware precharge scheme, the proposed TSPC FF precharges only when necessary. In addition, floating node analysis and transistor level optimization are employed to further ensure the high energy efficiency of the FF without significantly increasing the area. Later, the flipflop is modified by adding SET, RESET ,scan inputs and Finally a soft error tolerant Flipflop is designed. The proposed designs are implemented in Tanner EDA using 45nm technology file.
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Block Diagram
Specifications
Software Requirements:
- Tanner EDA
- Technology files:45nm
Hardware Requirements:
- Microsoft® Windows XP
- Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
- 512 MB RAM
- 100 MB of available disk space
Learning Outcomes
- Introduction to Flipflops
- Transistors & its applications
- Types of Transistors
- Logic Gates using Transistors
- Pull Up and Pull Down networks
- Importance of Transistors
- MOS Fundamentals
- NMOS/PMOS/CMOS Technologies
- How to design circuits using Transistor logic?
- Transistor level design for Flipflops.
- How to design low power, high speed area efficient transistor level circuits?
- Drawbacks in CMOS technology
- Scope of Flipflops in today’s world
- Applications in real time
- Tanner EDA for design and simulation
- Solution providing for real time problems
- Project Development Skills:
- Problem Analysis Skills
- Problem Solving Skills
- Logical Skills
- Designing Skills
- Testing Skills
- Debugging Skills
- Presentation skills
- Thesis Writing Skills
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Disclaimer - Takeoff Edu Group Projects, are not associated or affiliated with IEEE, in any way. The IEEE Projects mentioned here are mentioned in the context of student projects, whose ideas are derived from IEEE publications, and not projects of or by IEEE.
