Low Power High Speed 4 Dimension FinFET SRAM

Project Code :TVPGBE145


The main objective of this project is to decrease the size of chip and to increase the speed by using FinFET Technology


In the most of  chips contains memory elements. So to decrease the size of the memory chips, to increase the speed, to reduce (Drain-induced barrier lowering ) DIBL and short channel effects at lower technology nodes we switch from MOSFETs to FinFETs. By using FinFETs we get complete control over the channel and the threshold voltage is lower. There are many other advantages of using FinFETs over MOSFETs like High drain current, Faster switching speed, Low power consumption. Lower switching voltage. Here in this paper we compare the speed of a 6T MOSFET SRAM Cell to 6T FinFET SRAM Cell.  All the designs are implemented using 45nm technology in H-spice

Keywords—MOSFETs, FinFETs, SRAM, DRAM, SNM, Read, Write

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram


Software Requirements:
·        H-spice
·        Technology files: 45nm
Hardware Requirements:
·        Microsoft® Windows XP
·        Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
·        512 MB RAM
·        100 MB of available disk space

Learning Outcomes

·         Introduction to memory cell

·         Knowledge on SRAM

·         MOS Fundamentals

·         NMOS/PMOS/CMOS Technologies

·         Transistor level design for read and Write Driver Circuit

·         Introduction to Analog Electronics

·         Importance of 6T-FinFET SRAM

·         Applications in real time

  • H- SPICE tool for design and simulation
  • Solution providing for real time problems

·         Project Development Skills:

o   Problem Analysis Skills

o   Problem Solving Skills

o   Logical Skills

o   Designing Skills

o   Testing Skills

o   Debugging Skills

o   Presentation skills

o   Thesis Writing Skills

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