Also Available Domains Arithmetic Core|Xilinx Vivado
In this paper, we proposes an inexact Baugh-Wooley Wallace tree multiplier with novel architecture for inexact 4:2 compressor optimized for realization using reversible logic. The efficacy of the proposed reversible logic based realization of the proposed inexact 4:2 compressor and Baugh-Wooley Wallace tree multiplier is measured in scales of Gate Count (GC), Quantum Cost (QC), Garbage Output (GO) and Ancilla Input (AI). An 8 × 8 Baugh-Wooley Wallace tree multiplier is implemented in this paper. To Enhance the speed of operation, the reversible logic gates are utilized on the partial product reduction part in multiplier. The proposed multiplier is utilized in two applications 1) image processing - one level decomposition using rationalized db6 wavelet filter bank and image smoothing and 2) Convolutional Neural Networks (CNN). The effectiveness of the proposed method is synthesized and simulated using Xilinx ISE 14.7.
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