High-Speed and Area-Efficient Scalable N-bit Digital Comparator

Also Available Domains Low Power VLSI|Tanner EDA

Project Code :TVPGTO350

Objective

This paper presents the area efficient N-bit digital comparator and it was designed with the help of two different modules which are comparison evaluation modules (CEM) and the second module is the final module (FM).

Abstract

In this project, an area-efficient N-bit digital comparator with high operating speed and low-power dissipation is proposed. The proposed comparator structure consists of two separate modules. The first module is the Comparison Evaluation Module (CEM) and the second module is the Final Module (FM). Independent from the input bit widths, CEM involve the regular structure of repeated logic cells used for implementing parallel prefix tree structure. The FM validates the final comparison based on results obtained from the CEM. The design is implemented using Cadence Virtuoso in 180nm technology.

Keywords: N-bit digital comparator, Comparison Evaluation Module (CEM), Final Module (FM).

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

Cadence Virtuoso
Technology files:180nm

Hardware Requirements:

Microsoft® Windows XP
Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
512 MB RAM
100 MB of available disk space

Learning Outcomes

Introduction to digital Comparator
Transistors & its applications

Types of Transistors
Logic Gates using Transistors
Pull Up and Pull Down networks
Importance of Transistors

MOS Fundamentals
NMOS/PMOS/CMOS Technologies
How to design circuits using Transistor logic?
Low power techniques
Transistor level design for digital Comparator
How to design low power, high speed area efficient transistor level circuits?
Scope of digital comparator in today’s world
Applications in real time
Cadence Virtuoso tool for design
Timing analysis
Power analysis
Solution providing for real time problems
Project Development Skills:

Problem Analysis Skills
Problem Solving Skills
Logical Skills
Designing Skills
Testing Skills
Debugging Skills
Presentation Skills
Thesis Writing Skills

Demo Video

Front End Domains

Arithmetic Core
DSP Core
Communications and Crypto Core
Design for Testability
Nano Technology

Back End Domains

Low Power VLSI
Transistor Logic
Core Memories

Tools

FPGA
Cadence EDA
Xilinx Vivado
Xilinx ISE
Tanner EDA

Others

Matlab Interfacing