Fast Arithmetic Operations with QSD using Verilog HDL

Also Available Domains Xilinx Vivado|Xilinx ISE|Xilinx Vivado

Project Code :TVMATO930

Abstract

In this paper a higher radix number system like quaternary signed digit number system (QSD) is used for faster and more accurate arithmetic operations. In the binary number system, the computation speed is limited by formation and propagation of carry especially as the number of bits increases. By using Quaternary Signed Digit Number System, it is possible to perform carry free addition, borrow free subtraction and multiplication. A QSD number system’s digit is represented by a number from -3 to 3. Carry free addition and borrow free subtraction can be performed for higher number of bits with constant delay and less complexity.

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Block Diagram

Specifications

Software  Requirements

·         Xilinx ISE 14.7 Tool

·         HDL: Verilog

Learning Outcomes

  • Basics of Digital Electronics
  • VLSI design Flow
  • Introduction to Verilog Coding
  • Different modeling styles in Verilog

o   Data Flow modeling

o   Structural modeling

o   Behavioral modeling

o   Mixed level modeling

  • Introduction to multiplier design
  • About QSD multiplication
  • Knowledge on partial product generation and reduction
  • Knowledge on adders, Multipliers
  • About QSD number system

·         Applications in real time

·         Xilinx ISE 14.7/Xilinx Vivado for design and simulation

·         Generation of Netlist

·         Solution providing for real time problems

·         Project Development Skills:

o   Problem Analysis Skills

o   Problem Solving Skills

o   Logical Skills

o   Designing Skills

o   Testing Skills

o   Debugging Skills

o   Presentation Skills

o   Thesis Writing Skills

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