Design of Three Stage Dynamic Comparator with Tail Transistor using 20nm FinFET Technology for ADCs

Also Available Domains H-Spice

Project Code :TVMABE173


The proposed design of Modified three stage comparator by using the tail transistor has been implemented to achieve the lower leakage power consumption and reducing the short channel effects.


According to this article, one of the key disadvantages is excessive power consumption and offset in CMOS based comparators. At scale down technology, CMOS suffers with short channel effect and leakage current. To address these challenges, FinFET technology is used in three-stage dynamic comparators instead of traditional circuit designs. The energy efficiency of FinFET-based dynamic comparators is higher than that of CMOS, and the short channel effect and leakage current are decreased. Furthermore, a new design of FinFET-based three stage dynamic comparators with tail transistors was created and simulated using the cadence virtuoso environment. In comparison to three-stage dynamic comparators without tail transistors, the three-stage dynamic comparator with tail transistor in this approach decreases offset, power consumption, and energy consumption.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram



Software Requirements:

·         H-spice

·         Technology files:20nm

Hardware Requirements:

·         Microsoft® Windows XP

·         Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support

·         512 MB RAM

·         100 MB of available disk space

Learning Outcomes

Learning Outcomes:

  • Introduction  to comparators
  • Transistors & its applications

o   Types of Transistors

o   Logic Gates using Transistors

o   Pull Up and Pull Down networks

o   Importance of Transistors

  • MOS Fundamentals
  • NMOS/PMOS/CMOS Technologies
  • How to design circuits using Transistor logic?
  • Transistor level design for comparators
  • How to design low power, high speed area efficient transistor level circuits?
  • Drawbacks in CMOS technology
  • Scope of  comparators in today’s world
  • Applications in real time
  • Hspice for design and simulation
  • Solution providing for real time problems

·         Project Development Skills:

o   Problem Analysis Skills

o   Problem Solving Skills

o   Logical Skills

o   Designing Skills

o   Testing Skills

o   Debugging Skills

o   Presentation skills

o   Thesis Writing Skills

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