Design of Hamming Code Encoding and Decoding Circuit Using Transmission Gate Logic

Also Available Domains Communications|Tanner EDA

Project Code :TVMABE108

Objective

In this paper, the Hamming code encoder and decoder circuit is implemented using transmission gate logic. The architecture is simulated with different technologies (16nm, 22nm, 32nm, and 45nm) with the help of TANNER EDA Tool for the study of total power dissipation of the circuit.

Abstract

In this paper, the Hamming code encoder and decoder circuit is implemented using transmission gate logic. The architecture is simulated with different technologies with the help of TANNER EDA Tool for the study of total power dissipation of the circuit. The analysis shows that with the decrease of channel length, there is an decrease of power dissipation in 45nm compared to 180nm 250nm in encoder and decoder circuit.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

Tanner EDA
Technology files:180nm

Hardware Requirements:

Microsoft® Windows XP
Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support
512 MB RAM
100 MB of available disk space

Learning Outcomes

Introduction Communication systems
Error correction codes
Significance of error correction codes in communication systems
Transistors & its applications
Types of Transistors

Logic Gates using Transistors
Pull Up and Pull Down networks
Importance of Transistors

MOS Fundamentals
NMOS/PMOS/CMOS Technologies
How to design circuits using Transistor logic?
Transistor level design for Error correction codes.
How to design low power, high speed area efficient transistor level circuits?
Drawbacks in CMOS technology
Scope of Error Correction Codes in today’s world
Applications in real time
Tanner EDA tool for design and simulation
Solution providing for real time problems
Project Development Skills:

Problem Analysis Skills
Problem Solving Skills
Logical Skills
Designing Skills
Testing Skills
Debugging Skills
Presentation skills
Thesis Writing Skills

Demo Video

Front End Domains

Cadence EDA
Finite State Machines
Arithmetic Core
Testing
DSP Core
Communications
Nano Technology

Back End Domains

Cadence EDA
Transistor Logic
Core Memories
Low Power VLSI

Tools

FPGA
H-Spice
Cadence EDA
QCA
Xilinx Vivado
Xilinx ISE
Tanner EDA
LT-Spice

Others

Matlab Interfacing

H-Spice

LT-Spice