Area Efficient Multilayer Arithmetic Logic Unit Implementation in Quantum-dot Cellular Automata

Quantum-dot Cellular Automata (QCA) is a new nano-scale technology that due to making significant improvements in the design of electronic circuits can be considered as an appropriate alternative to CMOS technology. The Arithmetic Logic Unit (ALU) is a fundamental component of the Central Processing Unit (CPU) to carry out the arithmetic and logical operations that multiplexer and full adder plays an important role in its operations. In this paper, a QCA multiplexer is proposed based on the cell interaction with less number of cell count. Likewise, a QCA multilayer ALU structure is designed with can perform both arithmetic and logical operations. A 1 bit ALU are implemented in this paper. The simulation results are executed and verified in QCAD tool.  The simulation results demonstrate that the proposed structures outperform in comparison to existing ALU in terms of cell number, area, latency, and power consumption.