A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable Truncation

Also Available Domains Xilinx ISE

Project Code :TVMAFE504


The main objective of this project is to design an approximate multiplier with high accuracy and dynamically truncate to maintain the required accuracy as per the user and to obtain power optimization.


In this project, we are going to design approximate multiplier by designing an approximate compressor with high accuracy compared to existing approximate compressors. Multipliers are among the most critical arithmetic functional units in many applications, and those applications commonly require many multiplications which result in significant power consumption. For applications that have error tolerance, employing an approximate multiplier is an emerging method to reduce critical path delay and power consumption. An approximate multiplier can trade off accuracy for lower energy and higher performance. In this paper, we not only propose an approximate 4-2 compressor with high accuracy, but also an adjustable approximate multiplier that can dynamically truncate partial products to achieve variable accuracy requirements. In addition, we also propose a simple error compensation circuit to reduce error distance. The proposed approximate multiplier can adjust the accuracy and power required for multiplications at run-time based on the users’ requirement. Experimental results show that the compared to existing accurate Wallace multiplier, the proposed adjustable approximate multiplier can be reduced in parameter values. The synthesis and simulation of the proposed designs can be implemented using Xilinx Vivado /Xilinx ISE 2018.3.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram


Software Requirements:

·         Xilinx Vivado/Xilinx ISE Tool

·         HDL: Verilog

Hardware Requirements:

·         Microsoft® Windows XP

·         Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support

·         512 MB RAM

·         100 MB of available disk space

Learning Outcomes

Learning Outcomes:

  • Basics of Digital Electronics
  • VLSI design Flow
  • Introduction to Verilog Coding
  • Different modeling styles in Verilog

o   Data Flow modeling

o   Structural modeling

o   Behavioral modeling

o   Mixed level modeling

  • Introduction to multiplier design
  • About wallace multiplication
  • Knowledge on partial product generation and reduction
  • Knowledge on adders, compressors
  • About approximation computing
  • Applications in real time

·         Xilinx ISE 14.7/Xilinx Vivado for design and simulation

·         Generation of Netlist

·         Solution providing for real time problems

·         Project Development Skills:

o   Problem Analysis Skills

o   Problem Solving Skills

o   Logical Skills

o   Designing Skills

o   Testing Skills

o   Debugging Skills

o   Presentation Skills

o   Thesis Writing Skills

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