A Highly Secure FPGA-Based Dual-Hiding Asynchronous-Logic AES Accelerator against Side-Channel Attacks

Also Available Domains Communications|Xilinx Vivado

Project Code :TVMATO976

Objective

The main objective of this paper is to secure the data from side channel attacks by utilizing the Async-logic AES with less area and low energy. The dual rail hiding is used in vertical SCA and ZV compensate S-box are employed to hide the horizontal SCA.

Abstract

Data Security is considered to be a major factor and plays an important role in most of the applications such as e-commerce, internet banking, military, satellite, wireless communications, electronic gadgets, appliances, signal and digital image processing, etc. Cryptography is a technique which is used to keep the data safe and secret by changing it into a form so that unnecessary users cannot understand. This technique provides a strong, economical way to keep our data as a secret and helps in data integrity verification. Cryptography technique is facing issue from side channel attacks and unable to provide error free data. The proposed AES accelerator achieves vertical (amplitude) SCA hiding via an area-efficient dual-rail mapping approach and a zero-value (ZV) compensated substitution-box (S-Box), while enhancing the horizontal (temporal) SCA hiding of asynchronous logic operations via a timing-boundary-free input arrival time randomizer and a skewed-delay controller. This design will decrease the area overhead and provide strong resistance from side channel attacks. The proposed design is executed in Xilinx ISE 14.7 and the output is verified using simulation results.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Specifications:

Software Requirements:

·         Xilinx ISE 14.7

Hardware Requirements:

·         Microsoft® Windows XP

·         Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support

·         512 MB RAM

·         100 MB of available disk space

Learning Outcomes

Learning Outcomes:

  • Basics of Digital Electronics
  • VLSI design Flow
  • Knowledge in Cryptography.
  • Advanced Encryption Scheme (AES) technique
  • Data security
  • Side channel attacks (SCA)
  • Applications in real time

·         Solution providing for real time problems

·         Project Development Skills:

o   Problem Analysis Skills

o   Problem Solving Skills

o   Logical Skills

o   Designing Skills

o   Testing Skills

o   Debugging Skills

o   Presentation Skills

o   Thesis Writing Skills

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