A High-Throughput VLSI Architecture Design of Canonical Huffman Encoder

Also Available Domains Xilinx Vivado|Xilinx ISE

Project Code :TVMAFE496

Objective

The idea of this paper is to reduce the time complexity over the existing standard Huffman encoder. This will be achieved using the splitting tree technique. High compression radio is added advantage of CHN.

Abstract

Huffman encoder uses a kind of algorithm also named Huffman encoding technique which takes input as strings that are 1byte or 8 bit size and drastically reduce it to around 1 bit or more. So its encoding the data of strings to binary bits (reduced binary bits). This circuit includes frequency sorting block and Huffman block. Where frequency sorting block sort the strings in ascending order w.r.t their frequency regarding ascii values and sends the sorted data to the huffman encoder where encoder encodes those data to reduced bits. Here in this paper we are taking 64 bits data that is 8 string values and sorting them with their ascii values and encode each byte into less than a byte. On worst case one of the encoded data would be 8bit that is 1 byte.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Specifications:

Software Requirements:

Xilinx ISE/Xilinx Vivado

Hardware Requirements:

·         Microsoft® Windows XP

·         Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support

·         512 MB RAM

·         100 MB of available disk space

Learning Outcomes

Learning Outcomes:

  • Basics of Digital Electronics
  • VLSI design Flow
  • Knowledge in Cryptography.
  • Advanced Encryption Scheme (AES) technique
  • Data security
  • Side channel attacks (SCA)
  • Applications in real time

·         Solution providing for real time problems

·         Project Development Skills:

o   Problem Analysis Skills

o   Problem Solving Skills

o   Logical Skills

o   Designing Skills

o   Testing Skills

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