Items per page:
1 – 10 of 236
S.no
Project Code
Project Name
Action
1 TVPGFE302 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

Cadence EDA|Xilinx Vivado|Xilinx ISE

2 TVPGTO589 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Xilinx Vivado|Xilinx ISE

3 TVPGTO590 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx ISE

4 TVPGTO591 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx Vivado

5 TVPGFE303 Constant-time Synchronous Binary Counter with Minimal Clock Period

Xilinx Vivado|Xilinx ISE

6 TVPGTO592 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx ISE

7 TVPGTO593 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx Vivado

8 TVPGFE304 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Xilinx Vivado|Xilinx ISE

9 TVPGTO594 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx ISE

10 TVPGTO595 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx Vivado

Items per page:
1 – 10 of 236
Items per page:
1 – 10 of 236
S.no
Project Code
Project Name
Action
1 TVPGFE302 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

Cadence EDA|Xilinx Vivado|Xilinx ISE

2 TVPGTO589 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Xilinx Vivado|Xilinx ISE

3 TVPGTO590 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx ISE

4 TVPGTO591 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx Vivado

5 TVPGFE303 Constant-time Synchronous Binary Counter with Minimal Clock Period

Xilinx Vivado|Xilinx ISE

6 TVPGTO592 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx ISE

7 TVPGTO593 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx Vivado

8 TVPGFE304 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Xilinx Vivado|Xilinx ISE

9 TVPGTO594 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx ISE

10 TVPGTO595 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx Vivado

Items per page:
1 – 10 of 236
Items per page:
1 – 10 of 236
S.no
Project Code
Project Name
Action
1 TVPGFE302 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

Cadence EDA|Xilinx Vivado|Xilinx ISE

2 TVPGTO589 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Xilinx Vivado|Xilinx ISE

3 TVPGTO590 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx ISE

4 TVPGTO591 A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low...

DSP Core|Cadence EDA|Xilinx Vivado

5 TVPGFE303 Constant-time Synchronous Binary Counter with Minimal Clock Period

Xilinx Vivado|Xilinx ISE

6 TVPGTO592 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx ISE

7 TVPGTO593 Constant-time Synchronous Binary Counter with Minimal Clock Period

Design for Testability|Xilinx Vivado

8 TVPGFE304 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Xilinx Vivado|Xilinx ISE

9 TVPGTO594 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx ISE

10 TVPGTO595 Design and Analysis of Approximate Compressors for Balanced Error Accu...

Arithmetic Core|Xilinx Vivado

Items per page:
1 – 10 of 236
Final year projects