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VERILOG AND DESIGN CONCEPTS
SESSION(or)DAY TOPICS CONTENT
SESSION 1

Theory: Trends in VLSI

VLSI Design Flow and Current VLSI Technology.

Introduction to Digital Design.

SESSION 2

Theory:

Overview of Digital Design Concepts.

Importance of Digital Design.

Boolean algebra and logic circuits.

SESSION 3

Theory: Introduction to Digital Design

Number representation and arithmetic circuits.

Boolean algebra.

SESSION 4

Theory:

Combinational Logic Design.

SESSION 5

Theory:

Combinational Logic Design.

SESSION 6

Theory:

Sequential logic Design.

SESSION 7

Theory:

Sequential logic Design.

SESSION 8

Theory:

Sequential logic Design.

SESSION 9

Theory: Introduction to Verilog

Hardware Modeling Overview.

Verilog Language Concepts.

SESSION 10

Theory:

Modules and Ports.

Verilog Design Methodologies.

SESSION 11

Theory: Advanced Concepts

Combinational Circuit Design and Introduction to Tools.

Practical:

Introduction to CAD Tool Explanation.

Lab Exercise.

SESSION 12

Theory:

Combinational Circuit Design and RTL Level Coding.

Lab Exercise.

SESSION 13

Theory:

Combinational Circuit Design and RTL Level Coding.

Lab Exercise.

SESSION 14

PROJECT

SESSION 15

PROJECT

SESSION 16

PROJECT

SESSION 17

PROJECT

SESSION 18

Theory:

Designing of Sequential Circuits and RTL Level Coding.

Description Lab Exercise on Simulation and Synthesis tools.

Practical:

Lab Exercises on Sequential Circuit Design.

SESSION 19

Theory:

Sequential Circuit Design and RTL Level Coding.

Practical :

Lab Exercise on Sequential Circuit Design.

SESSION 20

Theory:

Sequential Circuit Design and RTL Level Coding.

Practical :

Lab Exercise on Sequential Circuit Design.

SESSION 21

Theory:

Sequential Circuit Design and RTL Level Coding.

Practical :

Lab Exercise on Sequential Circuit Design.

SESSION 22

Theory: Finite State Machines

Introduction to Finite State Machines.

Real time Examples on FSM’S.

Practical :

Coding Steps For FSM’S.

SESSION 23

PROJECT

SESSION 24

PROJECT

SESSION 25

PROJECT

SESSION 26

PROJECT

SESSION 27

Practical: Lab Exercises on FSM’s.

SESSION 28

Practical: Lab Exercises on FSM’s.

SESSION 29

Theory:

Introduction to Xilinx Stimuli.

Modeling Stimuli.

Practical :

Exercise on Stimuli for Various Design.

SESSION 30

Theory:

Various types of Memory Design.

Practical :

Lab Exercise on Memory Design.

SESSION 31

Theory:

Various types of Memory Design.

Practical :

Lab Exercise on Memory Design.

SESSION 32

Theory:

Designing of FIFO.

Practical :

Lab exercise on FIFO Design.

SESSION 33

Practical :

Various Real time Examples Design.

SESSION 34

Theory:

Study of PLD’s, CPLD’s.

Introduction to FPGA.

Design Flow and Overview.

Practical:

FPGA Implementation(Board Level Explanation).

SESSION 35

Practical: Design Verification Using FPGA.

Call us : (+91) 9030333433 / 08772261612
Mail us : takeoffstudentprojects@gmail.com
Mail us : info@takeoffprojects.com
Call us : (+91) 9030333433 / 08772261612
Mail us : takeoffstudentprojects@gmail.com
Mail us : info@takeoffprojects.com