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Back End Research Projects
Sl.No Project Code
Low Power VLSI Projects
Action
1 TVREBE19_28 Hybrid Logical Effort For Hybrid Logic Style Full Adders In Multistage Structures View Details
2 TVREBE19_03 Low-power And Fast Full Adder By Exploring New XOR And XNOR Gates View Details
3 TVREBE19_25 A Low Power And High Speed Voltage Level Shifter Based On A Regulated Cross Coupled Pull Up Network View Details
Back End Research Projects
Sl.No Project Code
Transistor Logic Projects
Action
1 TVREBE19_29 Hybrid Logical Effort For Hybrid Logic Style Full Adders In Multistage Structures View Details
2 TVREBE19_17 Parametric And Functional Degradation Analysis Of Complete 14-nm FinFET SRAM View Details
3 TVREBE19_10 Counter Based Low Power, Low Latency Wallace Tree Multiplier Using GDI Technique For On-chip Digital Filter Applications View Details
4 TVREBE19_11 Designing Efficient Circuits Based On Runtime-reconfigurable Field-effect Transistors View Details
5 TVREBE19_15 Low Leakage Clock Tree With Dual-threshold- Voltage Split Input–output Repeaters View Details
6 TVREBE19_14 Design And Characterization Of SEU Hardened Circuits For SRAM-based FPGA View Details
7 TVREBE19_26 A Low Power And High Speed Voltage Level Shifter Based On A Regulated Cross Coupled Pull Up Network View Details
8 TVREBE19_23 A 7t Security Oriented SRAM Bitcell View Details
9 TVREBE19_08 Radiation-hardened 14t SRAM Bitcell With Speed And Power Optimized For Space Application View Details
Back End Research Projects
Sl.No Project Code
Core Memories Projects
Action
1 TVREBE19_27 Energy Efficient Single-ended 6T SRAM For Multimedia Applications View Details
2 TVREBE19_01 Design Of Area-efficient And Highly Reliable Rhbd 10t Memory Cell For Aerospace Applications View Details
3 TVREBE19_18 Power Efficient And Reliable Nonvolatile TCAM With Hi-PFO And Semi-complementary Driver View Details
4 TVREBE19_05 Column-selection-enabled 10t SRAM Utilizing Shared Diff-vdd Write And Dropped-vdd Read For Power Reduction View Details
5 TVREBE19_20 Three-dimensional Monolithic FinFET-based 8T SRAM Cell Design For Enhanced Read Time And Low Leakage View Details
6 TVREBE19_12 Design And Characterization Of SEU Hardened Circuits For SRAM-based FPGA View Details
7 TVREBE19_24 A 7t Security Oriented SRAM Bitcell View Details
8 TVREBE19_06 Radiation-hardened 14t SRAM Bitcell With Speed And Power Optimized For Space Application View Details
Back End Research Projects
Sl.No Project Code
Cadence Oriented Projects
Action
1 TVREBE19_16 Parametric And Functional Degradation Analysis Of Complete 14-nm FinFET SRAM View Details
2 TVREBE19_02 Design Of Area-efficient And Highly Reliable Rhbd 10t Memory Cell For Aerospace Applications View Details
3 TVREBE19_04 Low-power And Fast Full Adder By Exploring New XOR And XNOR Gates View Details
4 TVREBE19_19 Power Efficient And Reliable Nonvolatile TCAM With Hi-PFO And Semi-complementary Driver View Details
5 TVREBE19_09 A Very Compact CMOS Analog Multiplier For Application In CNN Synapses View Details
6 TVREBE19_13 Design And Characterization Of SEU Hardened Circuits For SRAM-based FPGA View Details
7 TVREBE19_21 Three-dimensional Monolithic FinFET-based 8T SRAM Cell Design For Enhanced Read Time And Low Leakage View Details
8 TVREBE19_22 A 7t Security Oriented SRAM Bitcell View Details
9 TVREBE19_07 Radiation-hardened 14t SRAM Bitcell With Speed And Power Optimized For Space Application View Details
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