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Efficient Hardware Implementation of 256-bit ECC Processor Over Prime Field

EFFICIENT HARDWARE IMPLEMENTATION OF 256-BIT ECC PROCESSOR OVER PRIME FIELD

  • Project Code :
  • TVMAFE58
  • .
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EFFICIENT HARDWARE IMPLEMENTATION OF 256-BIT ECC PROCESSOR OVER PRIME FIELD

Exchange of private information over the public domain is very much susceptible to unauthorized access, therefore this necessitates the need for a cryptosystem to ensure the protection of information against forthcoming threats. Elliptical curve cryptography (ECC) has attracted the eyes of many scientists due to its smaller key size and high-speed operation. In this paper, an efficient hardware implementation using field programmable gate array (FPGA) on elliptical curve processor (ECP) over a prime field has been proposed. Jacobian coordinate has been used to avoid modular inversion, which is regarded as the most costly operation. To minimize the area and delay in modular multiplication, an interleaved modular multiplier has been proposed. Point doubling (PD) and point addition (PA) architecture was designed with the minimum arithmetic unit using the efficient modular multiplier algorithm. Furthermore, an efficient elliptical curve point multiplication (ECPM) module has been proposed using the high performance PD and PA architecture. It was found that the proposed ECPM module has a minimal delay and is very area efficient and thus it has immense potentiality in its application in modern day cryptosystem.

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