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Back End Major Projects
Sl.No Project Code Transistor Logic Projects Action
1 TVMABE09 Design Of Area Efficient And Low Power 4-bit Multiplier Based On Full- Swing GDI Technique View Details
2 TVMABE01 Design Of Area-efficient And Highly Reliable Rhbd 10t Memory Cell For Aerospace Applications View Details
3 TVMABE07 Counter Based Low Power, Low Latency Wallace Tree Multiplier Using GDI Technique For On-chip Digital Filter Applications View Details
4 TVMABE18 A 7t Security Oriented SRAM Bitcell View Details
5 TVMABE03 Low-power And Fast Full Adder By Exploring New XOR And XNOR Gates View Details
6 TVMABE10 Designing Efficient Circuits Based On Runtime-reconfigurable Field-effect Transistors View Details
7 TVMABE41 Design Of Swing Dependent XOR-XNOR Gates Based Hybrid Full Adder View Details
8 TVMABE05 A Very Compact CMOS Analog Multiplier For Application In CNN Synapses View Details
9 TVMABE25 Analysis Of 1- Bit Full Adder Using Different Techniques In Cadence 45nm Technology View Details
10 TVMABE26 Seda - Single Exact Dual Approximate Adders For Approximate Processors View Details
11 TVMABE37 Power Efficient Design Of Adiabatic Approach For Low Power VLSI Circuits View Details
12 TVMABE19 Energy Efficient Single-ended 6T SRAM For Multimedia Applications View Details
13 TVMABE28 Analysis Of Adiabatic Flip-flops For Ultra Low Power Applications View Details
14 TVMABE39 Low Power Approximate Unsigned Divider Design Using Gate Diffusion Input Logic View Details
15 TVMABE20 Hybrid Logical Effort For Hybrid Logic Style Full Adders In Multistage Structures View Details
16 TVMABE30 Power-delay-product, Area And Threshold-loss Analysis Of CMOS Full Adder Circuits View Details
17 TVMABE14 Parametric And Functional Degradation Analysis Of Complete 14-nm FinFET SRAM View Details
18 TVMABE33 Power Reduction In Domino Logic Using Clock Gating In 16nm CMOS Technology View Details

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