A New Energy-Efficient and High Throughput Two-Phase Multi-Bit per Cycle Ring Oscillator-Based True Random Number Generator

Also Available Domains Cadence EDA|Tanner EDA

Project Code :TVPGBE111

Objective

The main objective of this work is to achieve the high throughput of Random number generation and make the system to be energy efficient. The proposed circuit is designed in a standard 45 nm 1.2 V CMOS process to perform the True random number generation.

Abstract

Approximate computing is a promising approach for error-tolerant applications running on the Internet of Things (IoT) edge devices to reduce power consumption. However, approximate computation is susceptible to side-channel attacks, such as attacks based on Differential Power Analysis (DPA). Energy efficiency could be further enhanced by applying adiabatic logic in approximate edge computing while increasing its protection against the side-channel attacks. As a case study, we are presenting two approximate adders based on adiabatic logic to illustrate the benefits of approximate computation combined with adiabatic logic. The proposed approximate adders leverage the dual-rail property of adiabatic logic to minimize the overall size and further decrease energy consumption.

NOTE: Without the concern of our team, please don't submit to the college. This Abstract varies based on student requirements.

Block Diagram

Specifications

Software Requirements:

  • Cadence Virtuoso/Tanner EDA
  • Technology files:180nm

Hardware Requirements:

  • Microsoft® Windows XP
  • Intel® Pentium® 4 processor or Pentium 4 equivalent with SSE support 
  • 512 MB RAM 
  • 100 MB of available disk space


Learning Outcomes

  • Introduction to TRNGS
  • Need of TRNGS in Cryptographic applications
  • Transistors & its applications 
    • Types of Transistors 
    • Logic Gates using Transistors 
    • Pull Up and Pull Down networks 
    • Importance of Transistors
  • MOS Fundamentals
  • NMOS/PMOS/CMOS Technologies
  • How to design circuits using Transistor logic?
  • Transistor level design for TRNGS
  • How to design low power, high speed area efficient transistor level circuits?
  • Drawbacks in CMOS technology
  • Scope of TRNGS  in today’s world
  • Applications in real time
  • Tanner EDA/Cadence Virtuoso tool for design and simulation
  • Solution providing for real time problems
  • Project Development Skills:
    • Problem Analysis Skills
    • Problem Solving Skills
    • Logical Skills
    • Designing Skills
    • Testing Skills
    • Debugging Skills
    • Presentation skills
    • Thesis Writing Skills


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